Blanket removal rate

Initially, the step height reduction rate is very high due to the high local pressure on top of these up features. As time goes by, the up features are reduced rapidly and the pad starts to touch the down features. As a consequence, the pressure is partitioned between the up and down features, causing a fall in the up removal rate and a corresponding rise in the down removal rate. Finally, planarization is achieved and the removal rate reduced to the blanket removal rate. 

The equation is then solved for the oxide thickness z under the assumption that no down area polishing occurs until the local step, Zj, has been removed, after which the local rate is equal to the blanket polish rate. This is captured by expressing the effective density as... 

FIGURE 5.29 Correlation of relative blanket tungsten removal rate (W-RR) and PECVD-TEOS coating time [86]. 

FIGURE 7.4 Material removal rate on 8" tungsten blanket test wafers as a function of hydrogen peroxide concentration (from Ref. 12). 

FIGURE 7.20 Removal rate versus downforce on 8" Cu blanket test wafers polished at 75/65 rpm table/carrier speed and 200ml/min slurry flow rate on Strasbaugh u-Hance polisher. Diamond data points indicate the removal rate values with the organic particles, and square data points denote removal rate values for silica particles, both polished under identical formulation and abrasive concentration (from Ref. 110). 

TABLE 7.3 Removal Rate of 8" Blanket Test Wafers of Different Snbstrates at Similar Process Conditions with the Organic Abrasive Slurry [109]. 

FIGURE 13.17 Removal rates of nitride blanket films with 4 wt% of cerium oxide. Particle diameter of 440 nm, 5.6 psi with ICI400/Suba IV pad. 5% of ceria, SRS-231 slurry. pH adjusted with KOH unless otherwise indicated. 

The scroll type tool case, the oxide removal rate is high and the oxide removal does not stop even after the wafer surface becomes planar as expected. Also the table 2 shows the oxide removal rate on the blanket wafer and the patterned wafer for both tools. 

For simplicity and to understand the STI mechanism, we introduce the following assumptions. First, the planarization length is zero, that is, there is no interaction between removal rates of patterned and blanket areas, and second, there is no dishing or recess at field oxide between active silicon nitrides in feature size level. On the basis of the above assumptions, STI CMP procedures can be divided into four steps as showm in Fig.2. The first step is defined as the period in which initial step heights of patterned area are perfectly eliminated. At this stage then erosion is generated due to the difference of removal rate between patterned and blanket area as showm in Fig.2(b). The second step is defined as the period in which the fully planarized oxide surface of patterned area is polished to expose the silicon nitride top surface. 

In this period, there is no newly generated erosion because of the same removal rates in both areas as shown in Fig.2(c). During the third step, oxide layer that remains after the second step is polished in blanket area, whereas mixture of oxide and nitride is polished in the patterned area. Because the removal rate of the oxide/nitride mixed area is smaller than that of oxide, the erosion that is generated in first step decreases with polishing time during the third step. The final step is defined as the period in which erosion is generated due to the difference of removal rate between the mixed area and the nitride area as shown in Fig,2(d). In order to quantify and elucidate the STI CMP as explained above, some simple relations which can predict the post STI CMP erosion were derived. 

Fig.4 shows the calculated and experimental removal rate ratio of the mixed area at various pattern densities and pitch sizes. The calculated data increases with decreasing active pattern density and it is in good agreement with the experimental data. As can be seen in the diagram blanket oxide to nitride selectivity is 4.3 and decreases as active density increases. The selectivity change is greater in the low active density areas than in the high doisity areas. 

Film hardness of electrodeposited Cu film was found to reduce over time at room temperature by 43%. The hardness reduction was caused by Cu film self anneal where Cu grains grow fi om the initial 0.1 pm at as-deposit to 1 pm at the final stage. The significant hardness reduction and changes in film microstructure resulted in a 35% CMP removal rate increase. This removal rate increase translates to variations in manufacturing environment and are therefore simply unacceptable. It was found that anneals at temperatures around 100°C for several minutes in inert gas will stabilize blanket Cu films and provide consistent CMP removal rate. 

A well-known problem in CMP is that the pad wears over long periods of time as the number of wafers processed on the pad increases. Various strategies have emerged to address this concern, including ex-situ and in-situ pad conditioning, and run by run control. In previous work, we have demonstrated run by run control on blanket wafers, in which polish time and other process parameters are adjusted for the next or later wafer based on measurements on a previous wafer to compensate for removal rate and uniformity degradation [10,11]. In practical use, however, such run... 

FIGURE 3.26 Results of the CMP tests of blanket wafers in terms of the surfactant molecular weight (a) removal rate of SiOj film and (b) removal rate of Si3N4 film. 

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