Architectural Partitioning Performance

It comprises several wafers with different functional elements such as micro heat exchanger, mini fixed-bed catalyst chambers, manifolding structures and other components not disclosed. The flow partitioning was performed in a hierachic manner. A patent gives deeper insight into the generic construction architecture of the micro-reaction system. The wafers were bonded to a stack and equipped with fluid connections [137]. 

The enterprise groups common functions and subfunctions of the verified functional architecture into logical functional elements in a manner that permits their allocation to design elements. Allocation to design elements occurs when it is determined that the functional element can be accomplished by existing or newly developed items. If the functional element requires decomposition to permit its allocation, the fimctional decomposition is performed (6.3.2) to partition the functional element sufficiently to permit its allocation among hardware, software, and humans. Requirements traceability is estabhshed and recorded to ensure that all functions are allocated to elements of the system each system element performs at least one fimction. 

An alternative architecture can be derived if projection along the /-axis is performed. In this case, 14 PEs are required, and non-local links should be employed in order to achieve the minimum execution time. Moreover, the methodology offers the flexibility to produce a variety of alternative arrays, depending on the specifications, by selecting DVs that lead to different partitions of the index space. 

The presented work studied the application of modular networks for modelling reaction kinetics in biological processes. The study was restricted to the very simple ME architecture, with linear expert modules. The main results showed that the ME was able to perform task decomposition, in the sense that it could decompose the input space in three partitions that in reality correspond to 3 different growth pathways. In terms of modelling errors, it was shown that the ME did not represent an advantage in relation to the BP network, at least for the 2 simple case studies presented. However, it is expected that for more complex multidimensional problems, the performance of the ME network would be better. Work is being currently done in that direction. 

Architecture Performance, Instruction Set, Exceptions Processors, Memory, Buses Basic Partitions, Macrocells... 

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