Wafer stacking

Another approach to this problem involves heating the wafer at 750 F at very low pressures (<10 10 Torr prior to deposition.28 This has the effect of removing the native oxide by evaporation of SiO. Depositions were achieved in the temperature range of 750° to 850°C in SiH4 + H2. Since the authors were developing a hot-wall system with many wafers stacked close to each other, the deposition was carried out at 2 mTorr. Deposition rates of 20 to 45 A/min were achieved. As expected, dopant transition widths were very narrow, several hundred angstroms. Again, device studies on such a system have not yet been done. 

A single-step method for preparing polybenzoxazole adhesives is described. These agents are particularly useful in the semiconductor industry for chip and wafer stack applications. 

Substrate characteristics Wafer size, wafer stacks, feature size, feature density, and mechanical strength of each stack layer... 

TABLE 9.1 Physical Properties of Pre-WCMP Wafer Stack. 

Morrow P, Park C-M, Ramanathan S, Kobrinsky MJ, Harmes M. Three-dimensional wafer stacking via Cu-Cu bonding integrated with 65-nm strained-Si/ low- CMOS technology. IEEE Elect Device Lett 2006 27(5) 335-337. 

Lee KW, Nakamura T, One T, Yamada Y, Mizukusa T, Hasimoto H, Park KT, Kurino H, Koyanagi M. Three dimensional shared memory fabricated using wafer stacking technology. Digest of International Electron Device Meeting 2000. p 165-168. 

A good design of the structures to be bonded, together with state-of-the-art sealing equipment, now enable fast, reliable bonding over a whole wafer, for multiple wafer stacks, and for many wafers simultaneously. 

K. W. Lee, T. Nakamura, T. Ono, Y. Yamada, T. Mizukusa, H. Hashmoto, K. T. Park, H. Kurino, M. Koyanagi. Three-dimensional shared memory fabricated using wafer stacking technology. In Proc. Int l Electronic Device Meeting, 2000, pp. 165 - 168. 

Fig. 1.7 ITM Oxygen Module Architecture - Planar Wafer Stack Design (Figure provided by Air Products and Chemicals, Inc., under a US Department of Energy Cooperative Agreement)...

Wafer stacking. In this approach, entire wafers or segments of wafers containing ICs are stacked. Intercoimections are formed from vias in the silicon. 

Other Microturbine Applications Air-driven microturbines could also find applications other than power generation. For example, an optical modulator based on a rotating grading machine on the rotor has been demonstrated up to speeds of 60,000 rpm, driven by compressed air. The device integrated glass and silicon wafers to form the wafer stack. 

Adhesive bonding uses photoresist, spin-on glasses, or polymers to deposit a planarizing material between two wafers. Such materials can be annealed or UV cured at low temperature to provide a low-stress wafer stack. 

UV-NIL can be performed at room temperature, there is no need to heat and cool the mold/wafer stack as in thermal NIL. This leads to higher throughput, as UV curing takes only a few seconds, and improved fidelity of patterns. Also the process does not suffer from thermal expansion mismatch, as in thermal NIL, which might induce distortions of the printed patterns. (For this reason, it is mandatory to use the same material for mold and substrate in thermal NIL). 

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