Silicon oxidation circuits

Figure 4 SFM image of an integrated circuit (a) and close-up of silicon oxide on its surface (b).

An CCD read-out circuit having p-type input regions 2 is formed in an n-type silicon substrate 1. A silicon oxide layer 4 is formed and openings corresponding to the input regions are provided. Metal electrodes 3 are formed by vapor deposition to connect to the input regions. A... 

An electrochemical study of platinum and nickel deposition on silicon from fluoride solutions at the open circuit potential is presented. In the steady-state situation, the silicon oxidation current is balanced with a cathodic current such as to yield net zero current. In the case of platinum, the prevailing cathodic process is platinum deposition by hole injection into the valence band. In nickel solutions, a competition is established between nickel reduction and hydrogen evolution at pH=8 metal deposition is the prevailing reaction, either through a valence band process on p-type silicon or through a conduction band process on n-type. On the contrary, at pH<1 the hydrogen evolution reaction is kinetically faster and nickel deposition is not observed. The anodic and cathodic processes are coupled through the formation of silicon surface states. 

One obvious interpretation of above results is oxidation at the Si/Cu interface through voids in the Cu layer. As preliminary test to clarify whether these observations may be asssigned to copper and/or silicon oxidation, the porosity of the Cu films was inspected by immersing a Cu/Si junction into an acidic solution of CuSC>4 (pH 2) with increasing HF content. Initially, the open circuit potential (OCP) of the silicon covered by the Cu film was - 0.38V, which is equal to the rest potential of a clean Cu wire. This indicated that the junction n-Si/Cu/CuSC>4 solution was at equilibrium (Fig. 3A). Addition of a small amount of HF, up to 2%, however, induced a rapid shift of the OCP of the n-Si/Cu electrode, the value being intermediate between that of the Cu wire and that of the bare n-Si electrode in contact with the C11SO4 solution (Fig. 3B, the rest potential of bare n-Si is - 0 64 V). Since HF is known to dissolve Si oxide, the negative shift of the OCP means that HF actually reaches the Si surface, i.e. that Cu films are not ideally compact. Porosity of the Cu films is also... 

Membrane structures that contain the visual receptor protein rhodopsin were formed by detergent dialysis on platinum, silicon oxide, titanium oxide, and indium—tin oxide electrodes. Electrochemical impedance spectroscopy was used to evaluate the biomembrane structures and their electrical properties. A model equivalent circuit is proposed to describe the membrane-electrode interface. The data suggest that the surface structure is a relatively complete single-membrane bilayer with a coverage of 0.97 and with long-term stability/... 

Membranes are one class of thin films. If membranes provide a restrictive barrier to the free motion of molecules between phases, other thin film configurations possess a wider range of potential applications. One important new application of porous thin films is in the microelectronics industry, where the increase in the miniaturisation of circuits on microchips requires insulators with improved performance compared to the material that is currently used, dense silicon oxide. The electrical insulating properties of a material improve with decreased dielectric constant, k, so values lower than those of dense silicon oxide (k=3.9-4.2) are required. The lowest values of k are found in a vacuum, and gases have low k values, so porous silica with reasonable mechanical properties provides a sensible solution. Indeed, low k values (k < 2.2) have been demonstrated for porous materials, which can readily be prepared as thin films. One non-templated mesoporous silica, MesoELK (ELK=Extra Low k), has been developed by Air Products for applications in computing that require low... 

In recent years, the IR absorption of fluorinated silicon oxide (FjcSiOj,) has been actively studied [68-74]. These films are very easily deposited by several PECVD or liquid-phase deposition (LPD) methods and are characterized by a low dielectric constant, which decreases with increased concentration of fluorine in the film. Decreasing the dielectric constant of the intermetal dielectric film is the most efficient way to reduce the adjacent wiring capacitance, which will improve the performance of submicrometer integrated circuits. However, the F SiOy films become reactive to water as the fluorine concentration increases. The film desorbs H2O and HF under thermal annealing after humidification, which causes reliability problems in the VLSI fabrication [68]. 

The plates of the capacitors of integrated circuits (Fig. 2.50(b)) in most modem technologies (AUstot and Black, 1983) are formed by two heavily doped polysfiicon layers. The dielectric is usually a thin layer of silicon oxide. The whole capacitor is formed on a layer ofthick (field) oxide. The capacitors are temperature stable, their temperature coefficient is about 20 ppm/°C. A detailed comparative evaluation of the different metal oxide semiconductor (MOS) capacitor structures can be found in AUstot and Black (1983). 

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