Memory address space virtual

Table 3 shows how the various parts of the transform contribute to the total number of re-map operations. The total number of re-map operations roughly triples for each doubling of the data size. If a re-map operation takes 2 msec to re-define the CPU s address space, then approximately 3 sec or 5% of the total time of a 16K-16K transform is used for this purpose. If parts of the virtual array reside on disk, however, disk I/O will substantially increase the time required for an individual re-map operation. Clearly, the bit reversal routine becomes the least efficient of all the routines if memory re-mapping is slow. The execution times for the parts of the transform are shown in Table 4. Computationally, the least efficient routine is the final passes, because the algorithm used in the final passes is slower (by a factor of more than two) than the algorithm used for the internal transforms.

Virtual machine A system for managing memory in which multiple address spaces are possible. 

Systems that support virtual memory (that is, have the requisite hardware support) normally support a single virtual address space which all active processes share. Some systems, however, support multiple virtual address spaces one for each active process. This technique is termed virtual machine and requires additional complexity in the mapping functions and associated hardware. 

Additional database space must be allocated when intermediate data points are used. A system can be designed to use process I/O points as intermediates. However, the data acquisition software must be programmed to bypass these points when scanned. All system builders provide virtual data point types if the intermediate data storage scheme is adopted. These points are not scanned by the data acquisition software. Memory space reqmrements are reduced by eliminating unnecessary attributes such as hardware addresses and scan frequencies. It should be noted that the fiU-iu-the-forms technique is apphcable to all data point types. 

The MMU controls whether the VIC chip or 80-column chip controls screen display, and even senses the position of the 40/80 DISPLAY switch (though the software must interpret this switch). The MMU controls access to RAM or ROM, allowing either to be visible in the memory map. A programmer can set up a series of preset memory configurations and quickly select them by writing to the MMU. The address of the VIC chip can be relocated an5rwhere within the virtual 256K memory space. 

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