Liquid-Crystal and Electrophoretic Display Architecture

In the fabrication of OTFT backplanes there are complications related to the order in which the organic semiconductor and source/drain contacts are deposited and how they are patterned. The semiconductor must be patterned in order to avoid large leakage currents through the ungated areas. Complications arise because the 

FIGURE 6.4.13 (a) Schematic and (b) cross-section of an OTFT AMLCD pixel (not to scale). 

FIGURE 6.4.14 A portion of an OTFT backplane for a PDLC display using pentacene devices on a PEN substrate. 

As a liquid crystal responds to an applied voltage, its capacitance changes. The change can be as large as a factor of three. In the absence of the storage capacitor, the stored voltage on the pixel can change by this same 

For example, in a typical SXGA (1280 x 1024) AMLCD, the refresh rate is 60 Hz, the frame time is 16.7 msec, and the line time is 16.3 psec. For 6-bit resolution, the RC charging time constant must be less than 3.3 psec. The total pixel capacitance is about 0.5 pF, so the TFT on-resistance must be less than 6.6 Mil. From liquation 

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