Hardware Description SMALL

The system definition of the WMH Biochemistry laboratory was produced in the form of sample flow diagrams, data flow diagrams, hardware interconnections and descriptive text. Each activity was reduced to small functional component, which in turn became the substrate for the FMECA and the HAZOP procedures. 

Synthesis results. The ECC was synthesized and mapped to cells in LSI Logic s LCAIOK library. Two experiments were performed to illustrate the effect of resource sharing. In the first experiment, the hardware resources implementing PARITY.3 and PARITY-4 were assumed to have small area cost. This assumption corresponds to the actual implementation of these resources based on their HardwareC description, e.g. PARITY 3 is a three bit XOR and PARITY-4 is a four bit XOR. In the second experiment, the area cost for these resources was increased ten-fold to demonstrate the case where the area reduction due to sharing resources outweighs the area increase due to multiplexers and latching registers. Synthesis results of these experiments are summarized in Table 11.9. 

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