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Coupled Temperature and Leakage Estimation

In the previous section, the power to temperature mapping is pre-characterized so that the transistor layer temperature can be computed knowing the power distribution. Although the dynamic power consumption of the design may be pre-determined [Pg.99]

To seek a relatively simple correspondence between the leakage and the temperature, a linear model is adopted as illustrated in Fig. 5.8[3 ). For each [Pg.100]

a relationship between the dynamic power and the temperature increase will be derived while considering the temperature dependent leakage power. Substituting (5.6) into (5.4) and expressing the total power as the sum of the dynamic power and the leakage power p = pA + / leak gives [Pg.102]

In this work, the package and heat sink of the 2.5-D/3-D IC are assumed to be thermally well designed such that the system is thermal-runaway free. Thermal runaway will happen if the positive feedback between the temperature and the [Pg.102]

In the above proposition, p(A) is the spectral radius of matrix A and it is equal to the largest absolute value of.d s eigenvalues. [Pg.103]


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