Vertical and Horizontal Integration with VLSI Semiconductor Chips

Vertical and Horizontal Integration with VLSI Semiconductor Chips 

Fortunately, over the past several years, the problems associated with each of the above requirements have been overcome and now integrated opto-chips are now relatively routinely fabricated [2, 3, 5, 63, 64, 271-278, 290-297]. The problem of irregular VLSI surface topology has been overcome by use of planarizing polymers such as Futerrex PC3-6000. The reflow properties of this polymer reduce the 1-6 micron semiconductor circuit features to surface variations of 0.2 microns after planarization. The optical quality of planarized surfac- 

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