Tungsten plug formation

a thin barrier layer of titanium is deposited by PVD on the wafer to line the bottom and the inside walls of the via-1 holes. The titanium serves to improve the adhesion of the tungsten plug to the ILD-1 oxide. Next, titanium nitride (TiN) is immediately deposited over the titanium as a diffusion barrier for the tungsten metal. Then, tungsten metal is deposited by CVD to fill the via-1 holes and coat the entire wafer. Finally, the tungsten is polished down to the upper surface of 

9 Copper interconnect wiring formation by means of the duai damascene technique 

Semiconductor Manufacturing Technology, p. 326, Prentice Hall, Englewood Cliffs, NJ (2001). 

The essential detail in the dual damascene technique is outlined in Fig. 16.19. It begins with the deposition of a blanket Si02 ILD oxide by means of the plasma-enhanced chemical vapor deposition (PECVD) technique to the desired thickness for the via. Next, a dense thin film of SiN is deposited on the ILD oxide by means of the high-density chemical vapor deposition (HDPCVD) technique. 

Sethuram, J.F. Wang, and L. Cook, Copper vs. aluminum a planarization perspective, Semi conductor Int., p. 178 (June 1996). 

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With the titanium silicide contacts in place, the next step in the CMOS fabrication process flow is the via-1 and tungsten plug formation, which involves the formation of metal connecting lines between transistors and other titanium silicide contacts. 

The formation of CVD-W plug was studied by a nonselective or blanket CVD-W and a selective CVD-W. Blanket CVD-W is deposited by the hydrogen or monosilane reduction of tungsten hexafluoride as shown in Eqns. (27), (35) and (36). At present, monosilane is mainly used as a reducing agent because of its high rates even at a low temperature. 

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