Synthesis of Benchmark Examples

Hercules and Hebe have been applied to the design examples in the benchmark suite proposed by the High-level Synthesis Workshop [Wor89]. Most of these benchmark examples have been rewritten in HardwareC and synthesized to logic-level implementations. 

To evaluate and compare the results of resource binding and scheduling in Hebe with existing systems, we make the following assumptions  

Design Lines Nodes Graphs Calls Size 

The heuristic design space exploration and conflict resolution strategy was 

Module Size Latency Register Area Delay 

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