NanoCell Proofs

In this section, some proofs involving NanoCells are presented. After a proof concerning biconnected components in NanoCells, there are several results on computing the probability that a random NanoCell will function as a particular logic gate. 

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Observations should be made for some of the more complex logic gates such as half adders or 1-bit adders. Once necessary and sufficient conditions are well defined, proofs should be generated. Note that one necessary condition will always be a path of on molecules from the inputs to the output. It should also be noted that NanoCell proofs may become much more complex when a variety of molecules are within each cell. 

Before exploring the optimization problems with the assumption of omnipotence and omniscience, it is worthwhile to ask whether such a problem is of practical use or is merely an academic exercise. This molecular electronics project is currently in the proof-of-concept phase. Before determining whether it is possible to train a NanoCell with realistic constraints, we are attempting to verify whether it is theoretically possible. If it becomes clear that it is impossible to train a randomly assembled NanoCell as a 2-bit adder, even with the assumptions of omnipotence and omniscience, then there is no point in trying to train one without these simplifying assumptions. Hence, the optimization problem with the supposition of omnipotence is of practical use. 

In this section, various areas of future research are discussed. First improvements in training individual NanoCells are covered, and then strategies for hooking NanoCells together are addressed. This is followed by a section on dropping the assumption of omnipotence for more realistic mortal training. The section concludes with the subject of proofs concerning trainability. 

In previous sections, NanoCell training proofs were presented. In this section, some possible methods for improving these results are explored. First, the results are for voltage in - current out NanoCells, and NanoCells will actually be voltage out. Therefore, the results should be adapted to this case. This will be extremely simple if the voltage in - current out observations hold for voltage in - voltage out with the new bistable latches. 

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