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Gated pulse

The intensity autocorrelation measurement is comparable to all of the spectroscopic experunents discussed in the sections that follow because it exploits the use of a variably delayed, gating pulse in the measurement. In the autocorrelation experiment, the gating pulse is just a replica of the time-fixed pulse. In the spectroscopic experiments, the gating pulse is used to mterrogate the populations and coherences established by the time-fixed pulse. [Pg.1975]

The frequency (o and gate pulse time-delay td dependent fluorescence up-conversion signal F(cojd) have been theoretically modeled by using an overdamped multi-mode Brownian oscillator model [5], The deconvoluted fluorescence spectrum is given by... [Pg.238]

Initial width Diffusive from gate pulse broadening... [Pg.627]

Linear gate Shaped linear pulse and gate pulse Linear pulse identical to linear input if gate pulse is supplied in time overlap... [Pg.566]

Fig. 5.3. Amount of bias stress, measured as fractional current decay after a 100 ms gate pulse (Vc = -20 V), as a function of temperature in PQT-12. Fig. 5.3. Amount of bias stress, measured as fractional current decay after a 100 ms gate pulse (Vc = -20 V), as a function of temperature in PQT-12.
TC/BG BC/BG SC/BG BC/TG PR-TRMC Top contact/bottom gate Bottom contact/bottom gate Sandwich contact/bottom gate Bottom contact/top gate Pulse-radiolysis time-resolved microwave conductivity technique... [Pg.276]

Fig. 7. Circuit and waveforms used to study the dynamic behavior of the FET and the simulated liquid crystal element. VD, potential applied to drain Va, gate pulses V, observed potential across 10-pF capacitor simulating liquid crystal element. The dashed lines indicate 0 V. Fig. 7. Circuit and waveforms used to study the dynamic behavior of the FET and the simulated liquid crystal element. VD, potential applied to drain Va, gate pulses V, observed potential across 10-pF capacitor simulating liquid crystal element. The dashed lines indicate 0 V.
Fig. 8. Voltage level V c across the 10-pF capacitor plotted against the width of the gate pulse necessary to obtain the value of LC, using the circuit shown in Fig. 7. VD = 10 V Va = +15 V. [From Mackenzie et al. (1983).]... Fig. 8. Voltage level V c across the 10-pF capacitor plotted against the width of the gate pulse necessary to obtain the value of LC, using the circuit shown in Fig. 7. VD = 10 V Va = +15 V. [From Mackenzie et al. (1983).]...

See other pages where Gated pulse is mentioned: [Pg.1968]    [Pg.1974]    [Pg.1976]    [Pg.1976]    [Pg.1976]    [Pg.1977]    [Pg.1977]    [Pg.2955]    [Pg.2956]    [Pg.2957]    [Pg.2963]    [Pg.359]    [Pg.54]    [Pg.55]    [Pg.55]    [Pg.56]    [Pg.57]    [Pg.59]    [Pg.65]    [Pg.67]    [Pg.97]    [Pg.135]    [Pg.25]    [Pg.62]    [Pg.63]    [Pg.227]    [Pg.303]    [Pg.304]    [Pg.434]    [Pg.627]    [Pg.348]    [Pg.519]    [Pg.19]    [Pg.323]    [Pg.329]    [Pg.335]    [Pg.335]    [Pg.25]    [Pg.11]    [Pg.98]    [Pg.152]    [Pg.153]   
See also in sourсe #XX -- [ Pg.25 , Pg.62 , Pg.65 , Pg.73 ]




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