Fault logic gates

The INTERMEDIATE event represeats a fault eveat that results from the iateractioas of other fault eveats that are developed through logic gates such as those defiaed above. 

The immediate causes of the TOP event are shown in the fault tree with thek relationship to the TOP event. If any one of the immediate causes results dkecdy in the TOP event, the causes are connected to the TOP event with an OR logic gate. If all the immediate causes are requked for TOP event occurrence, then the causes are connected to the TOP event with an AND logic gate. Each of the immediate causes is then treated in the same manner as the TOP event, and its immediate, necessary, and sufficient causes are determined and shown on the fault tree with the appropriate logic gate. This development continues until all intermediate fault events have been developed into thek basic causes. 

Fault Tree Analysis Faiilt tree analysis permits the hazardous incident (called the top event) frequency to be estimated from a logic model of the failure mechanisms of a system. The top event is traced downward to more basic failures using logic gates to determine its causes and hkelihood. The model is based on the combinations of fail-... 

Intamiediate event A fault event that occurs because of one or more antecedent causes acting through logic gates. 

Standard and ADL Usage Logic gate where output fault occurs if at least one of the input faults/events occurs... 

Top event the unwanted event or incident at the "top" of a fault tree that is traced downward to more basic failures using logic gates to determine its causes and likelihood of occurrence. 

Unlike a formal fault tree, this method is empirical and does not require logic gates to be established. All boxes are scrutinized to determine their validity. If the content of a box is refuted by hard evidence, it is crossed off with an appropriate explanation. Otherwise, the boxes are left connected to show the logical progression upward toward an incident. 

Generate the first branch of the fault tree, applying the logic gates (see Figure... 

CONSTRUCTING THE FAULT TREE. Fault tree construction begins at the top event and proceeds, level by level, until all fault events have been traced to their basic contributing events or basic events. The analysis starts with a review of system requirements, function, design, environment, and other factors to determine the conditions, events, and failures that could contribute to an occurrence of the undesired top event. The top event is then defined in terms of sub-top events, i.e., events that describe the specific "whens and wheres" of the hazard in the top event. Next, the analysts examine the sub-top events and determine the immediate, necessary, and sufficient causes that result in each of these events. Normally, these are not basic causes, but are intermediate faults that require further development. For each intermediate fault, the causes are determined and shown on the fault tree with the appropriate logic gate. The analysts follow this process until all intermediate faults have... 

The second type of logical gate used in fault trees is the and cate, the symbol for which is shown in Figure 15.6. All inputs to an and cate need to be positive for the output to be positive. 

This section presents the basic set of definitions that will be used throughout this work. The definitions encompass from defects and upsets that occur in individual logic gates to fault, error, and failure. 

A fault tree normally contains two types of logic gates OR and AND. Consider the case where three causes A, B, C can contribute to an event X. If all three causes must exist simultaneously before X can occur, they would be shown on a fault tree connected to X through an AND gate. Alternatively, if any of the... 

Using these ground rules, each fault tree should be developed from the top-level event down to its basic events through a successive number of logic gates. 

Note The FTA is primarily a graphical method using logic gates and fault events to model the cause— effect relationship in causing an undesired event This gr cal method can be translated into a mathematical model to compute failure probabiUties mid system importmice measures [Eiicson, 2005, Chapter 11]. This quantitative iproach provides more useful results, but requires mo e time (e.g. gathering of component failure rate data) mid expmenced personnel. 

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