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Unconnected Ports

After synthesis, execute the check design command. Analyze the results to make sure there is no unused logic in the design. Useful details about the design such as unconnected ports, feedthroughs, and multiple drivers are provided by this command. [Pg.118]

It could happen that a synthesized netlist has a module instance with an unconnected input port. Such a case is shown in the following example. [Pg.178]

The signal list must contain the same number of signals as the port declaration. If a port on the component is to be left unconnected, the ke)nvord Open must be substituted for the signal name. [Pg.58]


See other pages where Unconnected Ports is mentioned: [Pg.178]    [Pg.178]    [Pg.298]    [Pg.440]    [Pg.428]    [Pg.440]    [Pg.215]   
See also in sourсe #XX -- [ Pg.178 ]




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