Trilevel resists pattern transfer

Figure 6. Schematic of a trilevel-resist process, (a) The top imaging layer is separated from the bottom planarizing layer by a transfer (or isolation) layer, (b) The pattern of the top image is transferred into the isolation layer. (c) The top layer is removed, and the pattern is transferred from the isolation layer to the substrate through the planarizing layer, (d) The remaining planarizing layer is stripped to complete the process.

Trilevel Schemes. Trilevel processing (6, 7) requires planarization of device topography with a thick layer of an organic polymer, such as polyimide or a positive photoresist that has been baked at elevated temperatures ( hard baked ) or otherwise treated to render it insoluble in most organic solvents. An intermediate RIE barrier, such as a silicon dioxide, is deposited, and finally, this structure is coated with the desired resist material. A pattern is delineated in the top resist layer and subsequently transferred to the substrate by dry-etching techniques (Figure 3). 

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