System planning for future VLSI systems

Institute of Microelectronics, Tsinghua University Beijing 100084, P. R. China, dengyd tsinghua.edu.cn 

Electrical and Computer Engineering Carnegie Mellon University 5000 Forbes Avenue, Pittsburgh, PA 15213-3891 USA, maly ece.cmu.edu 

Keywords 2.5-D integration, crossbar, Rambus DRAM, reconfigurable data-path, microprocessor, memory, latency. 

In Chapter 2, we have proven that the 2.5-D integration scheme offers potential for significant cost saving. Nevertheless, the feasibility of 2.5-D integration can hardly 

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Figure 2.6 System planning for future VLSI systems...

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