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Surface-state trapping

Figure 6 Diagram illustrating qualitative energetics for back ET via two pathways direct transfer from the bottom of the conduction band and transfer mediated by interfacial surface states (trap states). Note that the rate constants for the two processes may differ. Figure 6 Diagram illustrating qualitative energetics for back ET via two pathways direct transfer from the bottom of the conduction band and transfer mediated by interfacial surface states (trap states). Note that the rate constants for the two processes may differ.
Midgap state ejfects surface-state trapping... [Pg.78]

Because of the large distribution of trap levels and difficulties in preparing a homogeneous surface, surface-state trapping is usually studied by characterising the surface recombination velocity. The details of the trapping dynamics can only be qualitatively determined as a product of an effective cross section and surface-state density. These experiments are generally conducted under zero-field conditions (e.g. [Pg.81]

Small semiconductor particles are characterized by a high extent of lattice defects affecting bond lengths (ref. 10) and solubility (ref. 21) and leading to surface states energetically located within the band gap (refs. 22, 23). The surface states trap electrons and therefore suppress the recombination of light induced electron-hole pairs. The holes remain available for photocorrosion, i.e. the oxidation of sulfide ions belonging to the lattice of the semiconductor. [Pg.195]

Without preamplification surface state trapping noise will still be a problem for 3-5 pm systems for TDI clocking frequencies over 10 kHz however since the CCD can be fabricated in silicon a buried channel device could be used to circumvent this noise problem. In any case a tapered register is usually used for TDI as shown in Fig. 6.8 to provide a constant fat zero from the background. With this hybrid approach the CCD well width is not directly related to the photoactive area so that saturation problems can be relieved by using a wide register near the end, but this increases the separation requirement between TDI channels, complicating focal plane layout since no more than a 2 1 interlace is desirable. [Pg.216]

Ding, J., McAvoy, T.J., Cavicchi, R.E., and Semanchik, S. Surface state trapping models for Sn02-based microhotplate sensors. Sensors Actuators B 2001, 77, 597-613. [Pg.733]


See other pages where Surface-state trapping is mentioned: [Pg.298]    [Pg.180]    [Pg.42]    [Pg.54]    [Pg.80]    [Pg.80]    [Pg.82]    [Pg.82]    [Pg.83]    [Pg.83]    [Pg.84]    [Pg.109]    [Pg.121]    [Pg.72]    [Pg.228]    [Pg.228]    [Pg.18]    [Pg.699]   
See also in sourсe #XX -- [ Pg.42 , Pg.78 , Pg.79 , Pg.80 , Pg.81 , Pg.82 , Pg.82 , Pg.83 , Pg.84 ]




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Surface states

Trap states

Trapped state

Trapping states

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