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Silicon diffusion layers

Aravamudhan, Rahman, and Bhansali. [70] developed a micro direct ethanol fuel cell with silicon diffusion layers. Each silicon substrate had a number of straight micropores or holes that were formed using microelec-tromechanical system (MEMS) fabrication techniques. The pores acted both as microcapillaries/wicking structures and as built-in fuel reservoirs. The capillary action of the microperforations pumps the fuel toward the reaction sites located at the CL. Again, the size and pattern of these perforations could be modified depending on the desired properties or parameters. Lee and Chuang [71] also used a silicon substrate and machined microperforations and microchannels on it in order to use it as the cathode diffusion layer and FF channel plate in a micro-PEMFC. [Pg.221]

Obviously, the other side must be protected during the process to form one or the other active layer. Clearly, the silicon disc needs to be heated as well during the process to aid the diffusion process. Note that the surface will be rich in diffusing species and that the density of species declines within the mterior, forming a diffuse layer which is dense near the top and thinner in the interior of the silicon. What happens is that... [Pg.348]

Another way to use silicon wafers as DLs was presented by Meyers and Maynard [77]. They developed a micro-PEMFC based on a bilayer design in which both the anode and the cathode current collectors were made out of conductive silicon wafers. Each of fhese componenfs had a series of microchannels formed on one of their surfaces, allowing fhe hydrogen and oxygen to flow through them. Before the charmels were machined, a layer of porous silicon was formed on top of the Si wafers and fhen fhe silicon material beneath the porous layer was electropolished away to form fhe channels. After the wafers were machined, the CEs were added to the surfaces. In this cell, the actual diffusion layers were the porous silicon layers located on top of the channels because they let the gases diffuse fhrough fhem toward the active sites near the membrane. [Pg.223]

Besides silicon, other materials have also been used in micro fuel cells. Cha et al. [79] made micro-FF channels on SU8 sheets—a photosensitive polymer that is flexible, easy to fabricate, thin, and cheaper than silicon wafers. On top of fhe flow channels, for both the anode and cathode, a paste of carbon black and PTFE is deposited in order to form the actual diffusion layers of the fuel cell. Mifrovski, Elliott, and Nuzzo [80] used a gas-permeable elastomer, such as poly(dimethylsiloxane) (PDMS), as a diffusion layer (with platinum electrodes embedded in it) for liquid-electrolyte-based micro-PEM fuel cells. [Pg.223]

Ji and Kumar [107] presented an invention in which, after treatment with PTFE, the cathode diffusion layers are coated with a silicon solution in order to enhance the hydrophobic properties of the DFs. This silicon does not have to be coated over the whole surface of the DL, but could be coated in just certain areas, depending on the design of the cell, the location of fhe cell wifhin a stack, and the desired hydrophobic properties. It was demonstrated how a DL with the silicon coating improved the performance of a single fuel cell when operating at high relative humilities [107]. [Pg.229]

With polymeric phases containing a relatively thick silicon rubber layer inside the pores not only the reduction in pore diameter available for solute diffusion but also the mass transfer resistance in the alkyl polysi-... [Pg.253]

Point Defect Generation During Phosphorus Diffusion. At Concentrations above the Solid Solubility Limit. The mechanism for the diffusion of phosphorus in silicon is still a subject of interest. Hu et al. (46) reviewed the models of phosphorus diffusion in silicon and proposed a dual va-cancy-interstitialcy mechanism. This mechanism was previously applied by Hu (38) to explain oxidation-enhanced diffusion. Harris and Antoniadis (47) studied silicon self-interstitial supersaturation during phosphorus diffusion and observed an enhanced diffusion of the arsenic buried layer under the phosphorus diffusion layer and a retarded diffusion of the antimony buried layer. From these results they concluded that during the diffusion of predeposited phosphorus, the concentration of silicon self-interstitials was enhanced and the vacancy concentration was reduced. They ruled out the possibility that the increase in the concentration of silicon self-interstitials was due to the oxidation of silicon, which was concurrent with the phosphorus predeposition process. [Pg.300]

Fig. 28. Representation of a hydrogenated field effect transistor. The carrier concentration in the active layer is controlled, before the gate deposition, by the hydrogen neutralization of the donors present in the highly silicon doped layer. The insert shows the free carrier concentration gradient from the gate, which results from the hydrogen diffusion. J. Chevallier and M. Aucouturier, Ann. Rev. Mater. Sci. 18, 219 (1988). Annual Reviews Inc. Fig. 28. Representation of a hydrogenated field effect transistor. The carrier concentration in the active layer is controlled, before the gate deposition, by the hydrogen neutralization of the donors present in the highly silicon doped layer. The insert shows the free carrier concentration gradient from the gate, which results from the hydrogen diffusion. J. Chevallier and M. Aucouturier, Ann. Rev. Mater. Sci. 18, 219 (1988). Annual Reviews Inc.
In a second embodiment the strip detectors A to H are mounted on an intrinsic p-type silicon substrate 3A covered by a silicon oxide layer 3B. A patterned arrangement of conductor tracks 21 is formed in the semiconductor base 3B. Each track is formed by diffusion or ion-implantation of an n-type dopant material, and isolated from adjacent tracks by means of a channel stop network 23. Bridging links of nichrome-gold are formed to define and connect the read-out regions to the tracks 21. The links 25 are paired and thus provide voltage detection contacts. The tracks 21 are connected to connection pads 29. Signal processing circuitry is incorporated in the semiconductor base layer 3B. [Pg.32]

It can therefore be concluded that irrespective of the precise boundary conditions, it is important to consider sub-continuum modeling approaches in the silicon layer. Notice that applying Fourier diffusion in the silicon channel layer leads to a substantial underprediction of the maximum hotspot temperature. [Pg.395]

The silicon is finely meshed near its surface, where a diffusion layer is formed. For each mesh, the following values are calculated potential , donor concentration in n-type semiconductor material Nn, acceptor concentration in n-type semiconductor material Np, donor mobility //n, acceptor mobility //p, donor current density Jn, and acceptor current density Jp. [Pg.465]


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See also in sourсe #XX -- [ Pg.220 ]




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