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Self-aligned double-patterning SADP scheme

3 Self-aligned double-patterning (SADP) scheme [Pg.815]

Eigure 17.19 shows the processing scheme for the SADP scheme. The process scheme begins with the first lithographic masking exposure to create resist images on a HM that is disposed on top of suitable semiconductor substrates such [Pg.815]

The next step is the conformal deposition of a spacer material, oftentimes a nitride film, over the HM patterns. A second etch step, called the etch hack step, is implemented in such a way as to remove the thickness of the spacer material corresponding to the thickness only on the horizontal surfaces, while leaving intact [Pg.816]

Step 1. Lithography 1. The first resist pattern is created. [Pg.816]

Step 4. Etch back. The top of the nitride spacer and the HMs are removed. [Pg.816]


See other pages where Self-aligned double-patterning SADP scheme is mentioned: [Pg.813]    [Pg.813]    [Pg.817]   


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