Performance Analysis—Inverter Switching Speed

When designing digital circuits we are usually concerned with the rise and fall times of the design, given device tolerances. The example given here is for a CMOS inverter, but the procedure used can be applied to any switching circuit with device tolerances. Wire the circuit below  

The models for the MOSFETs have tolerances in their threshold voltages and transconductances. The models for the MOSFETs are given below  

We would like to see how the rise and fall times vary with random device tolerances. We must set up the Transient Analysis to view waveforms versus time, and the Monte Carlo analysis to allow for device variations. First we will look at the input pulsed waveform. The property spreadsheet for Vi is  

II pulse width[pulsed voltage RISEJTIME INITIAL.VOLTAGE PERIOD DELAYTIME FALL TIME 

The attributes specify a 0 to 5 V pulse with a 0.5 ps pulse width and 1 ps period. A delay time of 100 ns is specified so that the pulse does not start until 100 ns after the beginning of the simulation. The rise and fall times are 1 ns. We would like to set up a Transient analysis to simulate one cycle of die input. Select PSpice and then New Simulation Profile from the Capture menus, enter a name for the profile, and then click the Create button. By default the 77/776 Domain (Transient Analysis type is selected. Fill in the parameters as shown in the 77/776 Domain dialog box below  

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