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Pentacene transient response

Fig. 14 (a) Steady state characteristics of pentacene transistors on silicon dioxide dielectric, (b) Transient response of pentacene transistors on silicon dioxide dielectric, (c) Pentacene drift and DC mobilities for fabrication scheme B (L = 7.5 pm)... [Pg.98]

The same phenomenon also manifests itself as an overshoot or undershoot in the drain current when a gate voltage step is applied. Similar effects have been observed in a-Si TFTs [13]. The details of this drain-current transient have been used to determine whether the responsible trapping states in pentacene OTFTs are electron traps or hole traps [14]. [Pg.562]


See other pages where Pentacene transient response is mentioned: [Pg.97]    [Pg.98]    [Pg.515]    [Pg.517]    [Pg.97]    [Pg.197]    [Pg.198]    [Pg.210]   
See also in sourсe #XX -- [ Pg.97 ]




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