High-level memory management

The description used here also includes the casting function f 1() on the input samples. Then, each subset of N elements (produced with the k iterator in node 4) is compared to the subset of the first N elements (produced in node 3). This comparison uses an accumulated multiplication of the two sets (node 5) for each value of the iterator k, resulting in the auto-correlation coefficients r [] []. In the CD interpolation application, these coefficients are considered as Toeplitz matrix elements after some further postprocessing embedded in the functions f2()-f5(). 

This description results in two sets of signal broadcast operations, labeled as node 4 and node 5. These in particular will result in a potentially large number of storage locations during memory management. 

Note that statements defining a single signal instance—like isclO, help, and return [0]—and simple assignments of one M-D signal to another—like a[i] = b[i]—are not considered as relevant M-D signal definitions at this stage. Hence, they are pruned from further analysis to decrease the complexity [31]. That is also why the functions fl()-f5() have been introduced in the description. 

The parameter set used in the demonstrator corresponds to iV = 512 input samples and 51 Toeplitz coefficients, i.e., a maximal shift of P = 50 relative to the input samples. 

A primary task in high-level architecture synthesis is the extraction of the data flow from a given algorithm description. The term data flow is defined here as the combination of operations and dependencies between them that define the algorithm. In contrast, control flow is then defined as a (partial) ordering of computations meeting the restrictions of their dependencies. The control flow is usually specified by introducing loops and function hierarchy. 

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M. van Swaaij, F. Pranssen, F. Catthoor, and H. De Man. Modeling data and control flow for high-level memory management. In Proc. 3rd ACM/IEEE Europ. Design Automation Conf., Brussels, Belgium, March 1992. 

P. Pochmiiller and M. Glesner. Memory management as a high level synthesis transformation. In ASIC 92, Rochester, pages 166-169, Sep 1992. 

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