Gate capacitance

Figure 11. Experimental and predicted differential conductance plots of the double-island device of Figure 10(b). (a) Differential conductance measured at 4.2 K four peaks are found per gate period. Above the threshold for the Coulomb blockade, the current can be described as linear with small oscillations superposed, which give the peaks in dljdVj s- The linear component corresponds to a resistance of 20 GQ. (b) Electrical modeling of the device. The silicon substrate acts as a common gate electrode for both islands, (c) Monte Carlo simulation of a stability plot for the double-island device at 4.2 K with capacitance values obtained from finite-element modeling Cq = 0.84aF (island-gate capacitance). Cm = 3.7aF (inter-island capacitance). Cl = 4.9 aF (lead-island capacitance) the left, middle and right tunnel junction resistances were, respectively, set to 0.1, 10 and 10 GQ to reproduce the experimental data. (Reprinted with permission from Ref [28], 2006, American Institute of Physics.)...

Fig 10.9 shows the output current plotted in both forms, Eqs (10.14) and (10.16). The mobility is about 1 cm V s which is comparable to the drift mobility of bulk a-Si H. It is cAddent that the Fermi energy in the channel remains within the band tail states and that the band tails are not much perturbed by the close proximity of the dielectric layer. If a nitride thickness of 3000 A with a dielectric constant of 7 is assumed, then the gate capacitance is 2 x 10 F cm". With parameters WjL= 10 and = 1 cm V" s", the channel conductance is 10" 2" at a gate voltage of 5 V. This value is about 1000 times smaller than crystalline silicon, because of the lower mobility. 

Figure 4.14. Cross-section high-resolution transmission electron microscopy (HRTEM) images of gate oxides for MOSFETs. Provided is an illustration of film thicknesses that result in identical capacitance for Si02( = 3.8), relative to a high- c dielectric k = 23.9) gate oxide. Hence, increased gate capacitance will result from thinner films comprising high- c dielectric materials. Reproduced with permission from Intel Corporation (http //www.intel.com).

The drain-source capacitance Qs can be neglected since only a constant drain voltage Vis is applied. The total gate capacitance is given by Cg = tot Q with yf tot ihs total gate area. The unity-gain bandwidth can now be calculated from Eqs. (8), (10) and (12) ... 

Figure 26.6 Model of geometric gate capacitances for (a) back-gated and (b) electrochemically gated SWCNT-FETs. In the case of back-gating, the geometric capacitance is determined by the capacitance of the Si02 dielectric. During electrochemical gating the electro-...

Many sensors use capadtors for interfacing to electronic circuits. The ability of the electronic circuit to resolve minute changes in capacitance translates into excellent sensor resolution. When used as displacement sensors, capacitive interfaces achieve resolutions down to the sub-atomic level. For example, the gyroscope described in [1] resolves displacements as small as 10-14 m. For comparison, the classical radius of an electron is 2.8 x 10 15 m and the distance between atoms in the silicon crystal is orders of magnitude larger, 2.5 x 10 10 m. The capacitance resolved by the circuit is 10-20 F, six orders-of-magnitude less than the gate capacitance of a transistor with sub-micron dimensions. 

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