Fluorine content in CVD-WSix films

Fukumoto et al.241 have found using SIMS analysis, that selective uptake of fluorine by the gate oxide after a 1000°C anneal of a CVD-WSix/poly-Si/Si02 stack occurs (see figure 9.19). In contrast, low fluorine 

Shioya et al.242 gathered more evidence that indeed the fluorine diffusion (fluorine becomes mobile at about 800°C) into the gate oxide is causing the problem. They found that even after 1000°C anneal no hydrogen or W could be detected in the gate oxide using SIMS. The phosphorous in the poly-Si does diffuse into the WSix film but not into the gate oxide. 

A consistent model of the action of fluorine on gate oxide was proposed by Wright and Saraswat243. In this study the fluorine was introduced in the poly-Si by means of ion implantation. This approach allows various fluorine levels to be studied and eliminates complications from other elements like tungsten or hydrogen or stress induced effects. To 

Ellwanger et al.244 showed by using double poly-Si EPROM structures that in terms of gate oxide performance, low fluorine SiH2Cl2-WSix (- 1017 at/cc F) only marginally increased gate oxide thickness whereas SiH4-WSix ( 1020 at/cc F) increased the thickness by about 20A. 

The stress of annealed silicide films is tensile and is normally in the range 5-15xl09 dyne/cm2. In this section we will elaborate on how stress varies with the anneal temperature and with other process parameters. First, we will discuss some device problems which result from this stress, namely, crack formation and delamination. Cracking and delamination are here defined as follows  

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