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Flip chips reliability issues

Other component reliability issues related to lead-free solders include flip chips and wafer level CSPs with lead-free solder bumps and balls, where the higher soldering temperature and higher stiffness of the lead-free solder can adversely effect the reliability of the low-k dielectric layer on the die. Low k dielectric is needed for high speed applications, but is typically more fragile and prone to cracking. [Pg.14]

Gu, Y., Nakamura, T. Interfacial delamination and fatigue life estimation of 3D solder bumps in flip-chip packages. In Microelectronics Reliability, Vol. 44, Issue 3 (2004), pp. 471-483. [Pg.312]

An application utilizing gold-coated nickel particles has been reported to provide reliable connection to unbumped flip chips [30]. Another study showed that ACAs containing larger particles could accommodate planarity issues due to surface roughness and nonflat or nonparallel pads, compared to ACAs containing smaller particles. It was very difficult to obtain 100 /o consistency in conduction with unbumped flip-chip dice using ACAs with small diameter balls [31]. [Pg.737]


See other pages where Flip chips reliability issues is mentioned: [Pg.309]    [Pg.1292]    [Pg.144]    [Pg.36]    [Pg.552]    [Pg.833]    [Pg.1015]    [Pg.1037]   
See also in sourсe #XX -- [ Pg.13 ]




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