Flip-Chip Arrangements

Flip-chip arrangements for connecting a mercury cadmium telluride chip to a read-out chip are presented in this chapter. 

When the flip-chip technique is used to connect two chips of different materials having 

In JP-A-616386S the mechanical stress of indium bumps connecting a silicon read-out substrate and an HgCdTe detector substrate is reduced by bonding the two substrates together at a temperature which is between the operational and the non-operational temperature of the detector. 

During the bonding process in JP-A-7111323 a silicon read-out substrate and an HgCdTe detector substrate are held at different temperatures. The amount of stress in the connector bumps will be reduced when the device is cooled from room temperature to an operating temperature of 77 K. 

In WO-A-9417557 an integrated circuit assembly is presented which includes a silicon thin film circuit bonded to a substrate of a material selected to provide the assembly with an effective thermal expansion characteristic that approximately matches that of an HgCdTe detector array. 

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