Dry Etching of SiC

Many authors proposed the chemical reaction of SiC and the plasma, but the most interesting one was that proposed by Sugiura et al [21]. They suggested the following reactions  

In conclusion, the etching technology for SiC has been improved in recent years. Although it is now possible to etch a mesa for device fabrication, there are still some problems that need to be solved. These problems include roughness of the etch surfaces, deposition of a C-rich SiC layer on the etched surface and slow etch rates. 

Gases Etch rate (nm min 1) Mask material Polytype Selectivity ratio Ref 

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Figure 6.12 Cross-sectional view of the 4H-SiC power BJT fabrication, (a) Starting epilayer structure. (b) Dry etching of emitter and base epilayers. (c) p implantation for guard rings and contacts to p-base. (d) Formation of ohmic contacts, (e) Over layer metal deposition, (f) Double metal process.

For semiconductor electronic applications, thermal oxides on SiC are employed as a masking material for ion implantation and dry etching, as a gate insulator for field-effect devices, and as a surface passivation. Oxidation can also be used to etch the surface of SiC, as well as for polarity determination and for the delineation of defects and boundaries in SiC [1]. The slow oxidation rate of deposited SiC has been used for local oxidation inhibition of silicon [2]. 

Ignatova, O., et al., 2013. Towards Vertical Sidewalls in III-V FinFETs Dry Etch Processing and Its Associated Damage on the Electrical and Physical Properties of (lOO)-Oriented InGaAs. Semiconductor Interface Specialists Conference 2013, San Diego, CA, USA. Jiao, S., et al., 2015. High quality graphene formation on 3C-SiC/4H-AlN/Si heterostructure. Mater. Sci. Forum 806, 89—93. 

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