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Device structures memory array

Fulfilling multilayer and miniature structures of memory devices led to the introduction of new materials and sfrucfures. For the structure, the design rule decreases less than 70 nm and the short channel effect (SCE) phenomenon appears to have a bad influence on fhe device drive if exisf-ing planar transistor (TR) is applied. To solve this problem, studies are in progress to apply recessed charmel array TR and three-dimensional structured FinFET in DRAM and floating gate, twin SONOS, and FinFET SONOS in flash memory (Eigure 6.3). [Pg.151]


See other pages where Device structures memory array is mentioned: [Pg.152]    [Pg.758]    [Pg.15]    [Pg.411]    [Pg.203]    [Pg.4]    [Pg.236]    [Pg.224]    [Pg.261]    [Pg.3223]    [Pg.2]    [Pg.667]    [Pg.2780]    [Pg.451]    [Pg.244]    [Pg.15]    [Pg.7]    [Pg.1764]    [Pg.204]    [Pg.533]    [Pg.995]    [Pg.521]    [Pg.127]    [Pg.270]   
See also in sourсe #XX -- [ Pg.330 ]




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