Current output stability characteristics

Here we will consider mainly the short-circuit current (SCC) output stability characteristics of both small grain, thin film CdSe and Cd(Se,Te)-based PEC s as well as those of single crystal CdSe-based cells, wh are different crystal faces are exposed to the solution, after they have undergone any of a series of surface treatments. These studies show a strong dependence of the output stability on solution composition, on real electrode surface area, on surface treatment, on crystal face and on crystal structure (for the Cd(Se,Te) alloys) (1,2 7). 

Figure 10 illustrates the short-term dc stability of the devices (Mackenzie et al, 1983). The output characteristics of one FET are shown for 10 successive scanning cycles of VG from —10 V to +45 V and back. The gate voltage was scanned in both directions at a rate of about 0.5 V sec-1. The traces show remarkably little drift or hysteresis in fact, the maximum variation in VG is approximately 0.4 V for a given value of source-drain current. 

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