Clock timing capacitor

There are apparently customers who soldered on ceramic capacitors in their power supplies and found the clock was just too low. They figured the capacitance was above the guaranteed upper tolerance band (a rare event with commercial ceramics ), and shipped them right back to their manufacturers. But the problem was only that as soon as the PCBs went through the soldering process, age reset (or de-aging) occurred and so capacitance rose. If only they had waited for some more time, their clocks would have been right on However, I would have preferred SMD him capacitors if stability was so important. 

The dual slope converter is superior to the successive approximation type in many respects, e.g. in having an automatic zero capability, good noise suppression, and accuracy which is not affected by capacitor rating or clock frequency. However, the use of the latter type of converter is limited because of its slow conversion time (about 30 ms). 

It is obvious that the time to effect this measurement -the eonversion time - is proportional to the pulse height. This variable dead time must be taken into account within the live time measurement system. The resolution of the ADC depends upon the relationship between the rate of discharge of the capacitor and the clock rate. If the discharge rate is decreased to shorten the conversion time, the resolution will be decreased because fewer clock pulses will be recorded. A faster clock would be needed to maintain the resolution. Clock rates of 100 MHz and 450 MHz are typical. (Note that this clock is separate from and independent of the live time correction clock.) Wilkinson ADCs are considered to have excellent linearity, and at one time were regarded as significantly better than other types of ADC. 

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