Chemical and Mechanical Planarization of Dielectric Films

The most commonly implemented and extensively investigated CMP steps are the preparation of planar premetal dielectrics (PMD) and interlayer dielectrics (ILD) films on wafer. Together they are labeled as oxide CMP, as they both use the same materials that are based on silicon dioxide. Both processes share the integration concerns in deposition, planarity, and defectivity. 

In addition to the construction of a multilevel interconnect network, the semiconductor industry also improves the performance of IC chips by incorporating low-resistivity metal wiring such as copper and new dielectric materials with lower k constant (see Section 1.3.1 for details). The added benefit of using low-fc dielectric materials includes a reduction in the crosstalk [29-31] and power dissipation [29-33]. The key challenge for the implementation of low-fc materials is related to their intrinsic weak mechanical properties. Furthermore, in order to achieve a k value below 2.2, practically all materials are made with pores that exacerbate mechanical stability issue [29-33]. This is a particular concern for the CMP community as the operation invariably involves mechanical stress and shear force. In addition, practically all low-fc dielectric materials are hydrophobic in nature. Lfpon exposure to moisture or wetness, the dielectric constant tends to increase. Therefore, unlike silicon-dioxide-based dielectric, the effective k constant may change after CMP. To 

FIGURE 1.6 Incorporation of hard masks to protect the low-k dielectric materials (from Ref 23). 

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