Applications of Density Models

The integrated modeling methodology is useful for several applications. These include the ability to determine the optimal amount of material to deposit before CMP, the provision of an effective characterization scheme through the use of planarization length as a process performance monitor [29, 55], and the correct prediction of post-CMP ILD thickness variation, which is useful for assessing the impaet of such variation on circuit performance [24,56]. 

A key benefit of accurate CMP models that needs emphasis is the capability to optimize layout design before polishing. Post-CMP ILD thickness variation is a serious concern from both functionality and reliability concerns. An effective method of minimizing this effect is the use of dummy fill patterns that lead to a more equitable pattern density distribution across the chip. Evaluation of such schemes before actual product implementation has become a major use of CMP modeling [53]. Dummy fill is also being investigated for front-end processes where shallow trench isolation CMP suffers from substantial pattern dependencies. 

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In this section, three example applications intimately related to the pattern dependent behavior of CMP are briefly discussed. First, we note the relative importance of die-level effects with respect to typical wafer-scale nonuniformity. Second, we describe recent application of the integrated density and step height model to the run by run control of ILD CMP. Finally, we summarize issues in the application of density models to prediction of shallow trench isolation. 

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