ACCUFET

As discussed earlier in Section 5.2, introducing thin n-type buried layers under the gate oxide is expected to improve channel mobility. The accumulation mode DMOS structure, referred to as ACCUFET, has been patented by Baliga in 1996 [35]. Experimental results on this structure implemented in 6H-SiC have been published in work [36]. Similar devices implemented in 4H-SiC and referred to as Accu-DMOSFET have been reported later by Singh et al. [37]. 

Figure 5.10 Basic structure of the ACCUFET and the reverse bias simulations showing electric field at the Si02/SiC interface. The reverse bias simulations were for three p+ base region spacings of 1, 2, and 4 fim. (Courtesy of R. Singh of CREE Inc.)...

Shenoy, P. M., and B. J. Baliga, The Planar 6H-SiC ACCUFET A New High-Voltage Power MOSFET Structure, IEEE Electron Device Letters, Vol. 18, Issue 12, December 1997, pp. 589-591. 

The problems with the poor inversion layer mobility in SiC can be addressed by using the ACCUFET structure shown in Fig. 13 (14). Here, the P-base region has been replaced with a very lightly doped N-region. If the spacing between the trench sidewalls is chosen so that the... 

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