Yield Analysis of Different VLSI Integration Approaches

2 Yield Analysis of Different VLSI Integration Approaches 

As discussed in the previous section, there exist multiple integration styles to build a given VLSI system into silicon. In this section, we present a unified cost analysis framework to compare various integration strategies. 

For a given semiconductor technology, the fabrication cost of a VLSI system can be measured by its total consumed silicon area, Sa, which is calculated as  

The yield, 7, is given by the product of yield over all system components and layout layers[4]  

A Silicon area when implemented as a single chip 4 cm2 

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