Timing constraints HardwareC

HardwareC also supports timing constraints and resource constraints. 

Timing and resource constraints Minimum and maximum timing constraints between the activation of operations can be explicitly specified in HardwareC. The language also supports resource constraints in terms of partial binding information and resource usage bounds. 

HardwareC supports two categories of design constraints timing and resource constraints. Timing constraints define upper and lower bounds on the time separation between operations. Resource constraints specify the number of resource components available, and partially bind calls to specific instances in the hardware implementation. The designer can also imbed arbitrary constraints in the description. This capability allows the designer to convey information that may be used by later synthesis steps. 

---