The Parasitic Capacitances Expressed in an Alternate System

If we look into the gate, from the viewpoint of the ac drive signal, the effective input charging capacitance is the parallel combination (arithmetic sum) of Cgs and Cgd. We are going to call this simply the gate or input capacitance Cg in our discussion. So 

The time constant of the charging/discharge cycles of the gate is therefore 

Note Here we seem to be indirectly suggesting that the drive resistance is the same for tum-on and turn-off. That need not be so. All the equations we will present can easily take any existing difference in the turn-on and turn-off drive resistances into account. So in general, we will have different crossover times for the turn-on and turn-off transitions. Also note, that in general, within a certain crossover interval (tum-on or turn-off), the actual time it takes for the voltage to transit need not be the same as the time the current takes (unlike the case of a resistive load). 

An alternative system of writing the capacitances is in terms of the effective input, output, and reverse transfer capacitances — that is, Ciss, Crss, and Coss respectively. These are related to the interelectrode capacitances as follows 

In most vendors datasheets, we can usually find Ciss, Coss, and Crss under the section typical performance curves. We will then see that these parasitic capacitances are a junction of voltage. Clearly, that can significantly complicate any analysis. So as an approximation, we are going to assume that the interelectrode capacitances are all constants. We will consult the typical performance curves of the mosfet, and then pick the value of the capacitance corresponding to the voltage that appears across the mosfet when it is OFF (in our given application). Later, we will show how to minimize this error, by the use of a certain scaling factor.  

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