Silicon nanowires schematic

Figure 11.11. Integration of nanowire photonics with silicon electronics. Schematic illustrating fabrication of hybrid structures. A silicon-on-insulator (SOI) substrate is patterned by standard electron-beam or photolithography followed by reactive ion etching. Emissive NWs are then aligned onto the patterned SOI substrate to form photonic sources. [Reprinted with permission from Ref. 59. Copyright 2005 Wiley-VCH Verlag.]...

Recently, a laser ablation-condensation technique was used to produce nanometer-sized catalyst clusters to grow nanowires by the VLS method. A schematic of the laser ablation apparatus used by Morales and Lieber (1998) to produce silicon nanowires is shown in Fig. 11. The target consists of silicon and the catalyst material (e.g., Sii AFeA), and a pulsed laser is used to produce nanometer-sized catalyst clusters within a reaction chamber at 1200°C. The ablated materials are carried by an argon gas flow, and the... 

Fig. 10. Schematic illustrating the growth of silicon nanowires by the VLS mechanism.

Fig. 5.7 Schematics of experimental setups for silicon nanowire growth ...

Fig. 19.6 Nanowires used to measure anomalous semiconductor-assisted gas ionization (a) a close-up SEM image of smooth silicon nanowires after annealing in HCl (b, c) SEM micrographs of a forest of, and a single, whiskered silicon nanowire that showed low-voltage FI (d) SEM images of whiskered nanowires after removal of gold catalyst for the tips (e) a three-dimensional schematic illustration of the device used to measure gas ionization on both types of nanowire. Note that the nanowires were planted at the anode.

A schematic of the proposed growth model is shown in Fig. 10.23. In this model, Co nanoparticles play a dual catalytic role. On the one hand, they catalyze silane formation by reacting first with silicon to form Co silicides, and then react with hydrogen to form silane while being reduced to Co metal. The second role of Co nanoparticles is their classic catalytic ability of making nanowires by first dissolving the silane and precipitating out Si nanowires. 

Schematic of patterning of Pt/ErSi2 nanowire and nanodot array on silicon substrate.

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