NAND logic

Tanaka and Iwata1561 have described an interesting system (14) that displayed all the hallmarks of a NAND logic gate at the molecular scale. The fluorescence of the heteroaromatic unit is quenched only when Ba2+ and SCN- ions are simultaneously present at suitably high concentrations. The fluorescence-quenching PET process comes into action only when the electron-rich SCN- is held near the fluorophore by coordination to an available site on the crown-complexed Ba2+ ion. 

As far back as 1984, Wolfbeis described the quenching of fluorescence of dibenzo-18-crown-6 ether in the presence of K+ and I ions [S71 this can now be viewed as NAND logic behavior. It is likely that the oxidizable I is ion-paired to the crown-bound K+ in much the same way as in the system involving 14, Ba, and SCN . 

Parker and Williams recently reported NAND logic action in the terbium complex 16.[S8] The delayed emission of the lanthanide ion is switched off when H+ and 02 are present simultaneously. Protonation of the phenanthridine side chain causes its triplet excited state to approach theTb(m) 5D4 excited state energetically. This leads to equilibration of these two excited states and sharing of their properties. Thus, the metal-centered state displays the 02 sensitivity usually only found in organic triplets. 

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Renaud N, Joachim C (2008) Design and stability of NOR and NAND logic gates constructed with three quantum states. Phys Rev A 78 062316... 

Fig. 7 A NAND logic gate and its corresponding truth table.

Figure 6. NAND logic with 9 via fluorescence output using Ba + and SCN inputs.

FIGURE 8.73 Electrical schematic of a CMOS NAND logic gate and its truth table. Copyright 2005 by Taylor Francis Group... 

NAND logic is also in the universal gate category, according to electronic engineers. The current inability of molecular-level counterparts to inherit this mantle has been mentioned previously in Section 2.5. NAND logic means that the output achieves the state 0 only when the inputs are both simultaneously 1. 

A NAND logic gate can be understood as an integration of NOT and AND gates where the output of the AND gate becomes the input to a NOT gate. Nice molecular examples are now available. 

Figure 1.2 Circuit representation of NOR and NAND logic gates.

It is obvious to see from Table 1.5 that the input bits can be recovered by applying the gate to the output Therefore, the Toffoli gate is reversible. Now, if a basic set of gates could be built from Toffoli, then it will be demonstrated that computation can be made reversible. In fact, it is a simple matter to implement NAND from Toffoli. All we have to do is to set the target bit as 1 at the input, and Toffoli will work just as NAND. In Table 1.5, these correspond to the 2nd, 5th, 6th and 8th lines. The first two entries of these lines, plus the corresponding bits on the last column, is just NAND logic (see Table 1.6). 

Fig. 12.32 Schematic representation of the three limiting equilibrium states produced from 40 and 46 seen upon treatment with appropriate ions. (Reprinted with permission from Kim, D. S. Lynch, V. M. Park, J. S. Sessler, J. L. Three Distinct Equilibrium Slates via Self-Assembly Simple Access to a Supramolecular Ion-Controlled NAND Logic Gate. J. Am. Chem. Soc. 2013, 135, 14889-14894 [88]. Copyright 2013 American Chemical Society)...

Furthermore, as a check of defect tolerance, large, multiple-switch NanoCells were tested for defect tolerance through the SPICE interface. With all switches in the "on" position, the cell showed NAND logic with on-to-off output current thresholds of approximately 20 1. Switches were then chosen at random and set to the "off position and the cell was evaluated periodically (data not shown). The average NanoCell tested had 1826 switches, and >60% of these switches could be turned to the off non-conducting state before the cell lost NAND functionality with the minimum output on-to-off ratio set-point of 10 1. This indicates a high tolerance for numerous faults in the NanoCell architecture. 

This is where the optimizer is very useful. If Figure 6.29 is examined, it can be seen that the logic that now remains implements die simple Boolean equations of a 2 x2 multiplier. For example, RESULTO is just (AO and BO), although it is implemented with the faster but equivalent Nand logic. This example has really illustrated the power of the logic optimizer. 

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