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Logic simulation

Take advantage of ongoing research aimed at the de velopment of models of the airflow within aircraft, terminals, and so forth, based on empirical studies of specific facilities, and explore the dispersal of chemical/bio-logical simulants under various release scenarios ... [Pg.41]

PSpice can be used as a logic simulator as well as a mixed analog/digital simulator. We will now simulate a switch-tail counter. Wire the circuit as shown ... [Pg.496]

Donigian AS, Imhoff JC, Bicknell BR, Kittle JL. Application guide for the hydro-logic simulation program—FORTRAN. EPA 600/3-84-066. Athens, GA US EPA, 1984. [Pg.645]

In this book, we will use a VHDL model of the miniMIPS that can be logically simulated and synthesized to ASIC, or programmed to FPGA platforms. [Pg.28]

Bose, S. Fisher, A. L. (1989), Automatic verification of synchronous circuits using symbolic logic simulation and temporal logic, tn Proceedings of the IMEC-IFIP Workshop on Applied Formal Methods for Correct VLSI Design . [Pg.233]

We designed the PLC logic simulator so that the individual logic faults could be switched on and compared to the behaviour of the correct logic network when a test is applied. The cumulative fault detection counts under different test profiles are summarised in Table 1. [Pg.185]

Having parameterised the model it is possible to convert a coverage measure into a residual fault estimate. Using the logic simulator we measured the coverage achieved using the customer tests that were applied to the Intermediate version of PLC logic implementation. The customer tests are summarised in Table 2. [Pg.186]

We evaluated the bound predictions using the known faults present in the logic. The failure probability per test, p(n) of each fault under different profiles were measured using the logic simulator with different faults enabled. The failure rates under different profiles are shown in Table 4. [Pg.189]

Logically, simulation is to be done at zero reflux rate, but the column will not conveige at zero reflux rate. The reflux rate is reduced to the minimmn possible value to achieve a converged soluhon. [Pg.303]


See other pages where Logic simulation is mentioned: [Pg.52]    [Pg.266]    [Pg.268]    [Pg.11]    [Pg.678]    [Pg.27]    [Pg.32]    [Pg.51]    [Pg.848]    [Pg.848]    [Pg.184]    [Pg.1288]    [Pg.1288]    [Pg.56]    [Pg.210]    [Pg.7]    [Pg.13]    [Pg.13]    [Pg.26]    [Pg.1]   
See also in sourсe #XX -- [ Pg.496 ]




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