Instruction Set Partitioning

Several instruction set partitions for the IBM System/370 are described in [Agnew82]. None of the methods took advantage of concurrency available at the instruction level. However, they represent a range of performance due to the way that the instruction set is partitioned in each case. The partitions are discussed in greater detail in Section 4.6.2. 

A research effort at IBM studied methods of partitioning the System/370 [Agnew82]. Instructions set partitioning was chosen as the best general method of partitioning primarily because of the reduced number of control breaks necessary with that partitioning scheme, and because it allows the partitions to be implemented on off-the-shelf microprocessors (Motorola s 68000). Seven instruction set partitioning schemes are described in the article that summarizes this research. APARTY s ability to address the various schemes is described below. 

This result indicates that APARTY is capable of addressing instruction set partitions, and makes reasonable choices of instruction groups in order to reduce data dependencies between the instruction subsets. 

Architecture Performance, Instruction Set, Exceptions Processors, Memory, Buses Basic Partitions, Macrocells... 

Since complete instructions (or groups of complete instructions) are implemented on single partitions, the partitions have the potential for concurrency. Thus, each partition could be implemented as a separate process if data dependencies are satisfied. An additional benefit of this type of partitioning is that the data paths on each partition may be simplified because each partition implements only a subset of the total instruction set. A simpler data path may allow for a faster clock rate, and thus better performance for the design. 

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