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Coarse-grained parallelization

Within an integral-driven procedure it seems natural to perform the parallelizing decomposition according to the pqrs summation in Eq. (2). This must lead to a relatively coarse-grain parallelization, because the important computational effort associated with identification of I-J pairs and evaluation of the corresponding coupling coefficients, then becomes distributed among all... [Pg.270]

ANTIBIOTICS - NUCLEOSIDES AND NUCLEOTIDES] (Vol 3) Coarse-grained parallelism... [Pg.232]

Shared-memory parallel processing was certainly more successful for QC in earlier applications and continues to play a significant role in high performance computational chemistry. A coarse-grained parallel implementation scheme for the direct SCF method by Liithi et al. allowed for a near-asymptotic speed-up involving a very low parallelization overhead without compromising the vector performance of vector-parallel architectures. [Pg.247]

A parallel implementation of the COLUMBUS MRSDCl program system described by Schuler et al.24 uses a coarse-grained parallelization approach... [Pg.253]

A Coarse-Grain Parallel Implementation of the Direct SCF Method. [Pg.308]

It is readily seen that the systematic grid search rapidly leads to a combinatorial block. For example, =4 and Acf 10° resrrlts in the generation of N=36 1.6 x 10 conformations. If this brate-force approach may still be feasible under the rigid body rotation (non-adiabatic) approximation, it rapidly becomes beyond the capacity of present-day computers when full geometry relaxation (adiabatic) is employed for each conformation generated. In this partictdar application comfort may come from coarse-grained parallelized corrrputer systems where many hundreds or even thousands of processors may share the computing burden. [Pg.113]

Interspersion of computation and communication time on a process in a fine-grained and a coarse-grained parallel algorithm. [Pg.94]

Modeling hardware behavior as a collection of concurrent and intoacting processes is natural for hardware description since hardware modules continuously operate on a time varying set of inputs. Therefore, blocks describe the structural relationships among the processes, which in turn describe algorithms containing a hierarchy of procedures and functions. Processes allow coarse-grain parallelism to be specified at the functional level. [Pg.23]


See other pages where Coarse-grained parallelization is mentioned: [Pg.232]    [Pg.95]    [Pg.265]    [Pg.271]    [Pg.231]    [Pg.289]    [Pg.296]    [Pg.297]    [Pg.370]    [Pg.188]    [Pg.1175]    [Pg.1179]    [Pg.363]    [Pg.370]    [Pg.746]    [Pg.386]    [Pg.95]    [Pg.72]    [Pg.181]   
See also in sourсe #XX -- [ Pg.214 , Pg.227 , Pg.242 , Pg.253 ]




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Coarse

Coarse grain

Coarse graining

Coarseness

Grain coarse-grained

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