Co-Optimization of Latches and Clock Networks

Papa and I. L. Markov, Multi-Objective Optimization in Physical Synthesis of Integrated Circuits, Lecture Notes in Electtical Engineering 166, 

Our contributions. In this chapter we develop specific techniques to address the challenges above. In particular we note the following contributions. 

Latch and Clock Co-Design. Latch locations are critically important to chip timing and dynamic power. We formalize the problem of optimizing latch locations for timing and power as follows. 

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Co-optimization of latches and clock networks in large-block physical synthesis... 

Co-Optimization of Latches and Clock Networks in Large-Block Physical Synthesis... 

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