Application to a Scanning Circuit

Concerning a logic circuit to operate this switching device, Matsumura and Nara (1982) studied inverters that are composed of an enhancement -channel driver TFT and p-channel load TFT. Step-shaped transfer characteristics have been realized. However, the operating frequency is not sufficient at the present time. 

They also fabricated three-phase-clock a-Si H CCDs with coplanar transfer electrodes. The n+-a-Si H resistive layer is set up on and between the electrodes to produce a uniform electric field in the charge-transfer direction. This results in 0.7% transfer inefficiency, at as high as 200-kHz clock frequency (Kishida et al., 1983.) 

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