AMD Opteron

Nodes often provide multiple sockets, each of which can accommodate a multicore chip (two or four sockets are common, and three-socket configurations exist as well). Figure 2.15 shows an example of a node architecture based on the quad-core AMD Opteron chip. Each chip has four cores (or processors, as we use the term here). Each core has its own first (LI) and second (L2) level caches. All four cores share the third level cache (L3). A crossbar switch connects the processors to two memory controllers for accessing off-chip memory. The crossbar has three additional high-speed links that can be used to connect other multicore chips or input/output devices. 

An example node consisting of four quad-core AMD Opteron chips. Memory, processors, and the parallel machine interconnect are reached though a ring network formed by connecting the crossbar switches. A single quad-core AMD Opteron chip provides four cores (C0-C3), two memory controllers, the System Request Interface (SRI), the crossbar, and the LI, L2, and shared... 

Shared memory computers in which all processors have equal access to all memory in the system are referred to as symmetric multiprocessors (SMP), and may also be called uniform memory access (UMA) computers. In the node shown in Figure 2.15, references to memory may need to pass through one, two, or three crossbar switches, depending on where the referenced memory is located. Thus, this node technically has a nonuniform memory access (NUMA) architecture, and, since the node is cache-coherent, this architecture is called ccNUMA. However, since the crossbar switches in the quad-core AMD Opteron implementation of ccNUMA exhibit high performance, this particular node would typically be considered to be an SMP. 

This is the computer that formed the basis for the Cray XT3 supercomputer. Every node has a 2.4 GHz dual core AMD Opteron processor, and a direct network provides each node with a 6.4 GB/s bidirectional link to its own switch using AMD HyperTransport . The switches connect to their six neighbors with 7.8 GB/s bidirectional links. 

Figure 4.4 The AMD Quad-Core Opteron microprocessor chip has four separate processors that act in paraiiei. The cores are the four iarge areas of irreguiar geometry, whiie the cache memory is shown in the gridiike regions and hoids cache memory. The totai siiicon area of 285 mm hoids 463 miiiion transistors. The criticai dimension is 65 nm. (Courtesy of AMD.)...

---