SiNW fabrication

SiNWs, fabricated through lithographic patterning or chemical synthesis, can be further reduced in diameter through a self-limiting oxidation process. For example, Liu et al. (1994) have shown that with an initial Si pillar diameter of 30 nm, 6-nm Si nanowires can be obtained using this approach. 

Using SiNWs fabricated by various methods, resistive gas sensors (Gao et al. 2010 Field et al. 2011), FET (McAlpine et al. 2007 Paska et al. 2011), Schottky type gas sensors (Skucha et al. 2010), and field-ionized gas sensors (Sadeghian and Islam 2011) have been designed. Examples of such devices... 

There are many top-down fabrication methods which also make it possible to fabricate SiNWs (Teo and Sun 2007 Schmidt et al. 2009 Bandaru and Pichanusakom 2010). Due to processing-related differences, one should distinguish between the fabrication of horizontal nanowires, that is, nanowires lying in the substrate plane (see Fig. 5.8e, f), on the one hand, and the fabrication of vertical... 

Sophisticated nanolectronic devices such as SiNW transistors and circuits have been fabricated by AFM oxidation nano-lithography. In this application, AFM oxidation generates a narrow oxide mask on top of the active layer of a silicon-on-insulator substrate. The unmasked silicon layer is then removed by using... 

Figure 13.16 SiNW transistor fabricated by AFM oxidation nanoiithography. (a] AFM image of a iocai oxide pattern to be used as mask, (b] AFM image of the SiNW connected to two piatinum eiectrodes. (c] High-resolution image of the SiNW shown in (b]. (d] Output (left] and transfer (right] and characteristics of the SiNW transistor. (Data adapted from Ref 90.] Abbreviation-. SiNW, silicon nanowire.

Figure 13.16 shows a SiNW 4 p.m in length and 9.5 nm in width. Figure 13.16a shows the silicon oxide mask. The thickness of the fabricated mask is about 3 nm. After etching, the SiNW is contacted to two platinum electrodes (Fig. 13.16b). The fabricated SiNW is the main element of a field-effect transistor formed by introducing a gate electrode. Here, the gate electrode is situated at the back of a silicon-on-insulator wafer. The output and transfer characteristics of the transistor formed with the SiNW described above are shown in Fig. 13.16d. The output curve (left panel) shows a clear dependence on the gate voltage. The off-state drain current leakage is about 10 A. The device shown above has an on/off current ratio of 10, and it can be used to develop very sensitive biomolecular sensors.

The fabrication of SiNWs requires access to cleanroom facilities, and two major fabrication techniques are used in preparing and assembling the minute nanowires either top-down or bottom-up. A good overview of these two techniques is given in the review by Chen et al. [6]. 

Comments All steps described in the exercise can be applied to functionalize any silicon-based devices, for example, SiNWs. The fabrication of SiNWs requires access to cleanroom facilities and can be done using bottom-up or top-down methods as described in Refs [6,7,14,18]. A short description of all the steps required to fabricate a functional device is available in Ref 8. Further steps leading... 

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