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Si MOSFETs

Figure 13.9. Schematic illustration of process steps for fabricating ps-Si MOSFET... Figure 13.9. Schematic illustration of process steps for fabricating ps-Si MOSFET...
Figure 13.11. High-frequency behavior of TFTs built with semiconductor wires and ribbons, (a) xs-Si MOSFETs on PI substrates. (Reprinted with permission from Ref. 17. Copyright 2006 IEEE) (b) xs-GaAs MESFETs on PET substrates, (c) Dependence of fT on gate length of xs-GaAs MESFETs. The different symbols represent measurements on different devices the dashed line corresponds to calculation. (Reprinted with permission from Ref. 82. Copyright 2006 American Institute of Physics.)... Figure 13.11. High-frequency behavior of TFTs built with semiconductor wires and ribbons, (a) xs-Si MOSFETs on PI substrates. (Reprinted with permission from Ref. 17. Copyright 2006 IEEE) (b) xs-GaAs MESFETs on PET substrates, (c) Dependence of fT on gate length of xs-GaAs MESFETs. The different symbols represent measurements on different devices the dashed line corresponds to calculation. (Reprinted with permission from Ref. 82. Copyright 2006 American Institute of Physics.)...
Figure 13.14. Bending tests on three-layer stacks of Si, GaN, and SWNT devices supported by a plastic substrate, (a) Images of the automated mechanical stages used to bend the system, (b) Normalized transconductances (gm/gom) of devices in each layer after bending (to a 3.7-mm radius) and unbending (to a flat state) the devices several thousand times, (squares ps-Si MOSFETs circles SWNT TFTs triangles ps-GaN HEMTs.) (Reprinted with permission from Ref. 42. Copyright 2006 American Association for the Advancement of Science.)... Figure 13.14. Bending tests on three-layer stacks of Si, GaN, and SWNT devices supported by a plastic substrate, (a) Images of the automated mechanical stages used to bend the system, (b) Normalized transconductances (gm/gom) of devices in each layer after bending (to a 3.7-mm radius) and unbending (to a flat state) the devices several thousand times, (squares ps-Si MOSFETs circles SWNT TFTs triangles ps-GaN HEMTs.) (Reprinted with permission from Ref. 42. Copyright 2006 American Association for the Advancement of Science.)...
Figure 5-1. Schematic diagrams of (a) a Si-MOSFET and (b) a GaAs MESFET. Figure 5-1. Schematic diagrams of (a) a Si-MOSFET and (b) a GaAs MESFET.
Figure 6.2. Schematic structures of [a] a single-crystal Si MOSFET, [b] amorphous silicon TFT, and [c] polycrystalline silicon TFT. Figure 6.2. Schematic structures of [a] a single-crystal Si MOSFET, [b] amorphous silicon TFT, and [c] polycrystalline silicon TFT.
The fastest Si MOSFETs produced to date have intrinsic switching times well under 500 fs. Source Bohr, 2002. Reprinted with permission. [Pg.29]


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See also in sourсe #XX -- [ Pg.77 , Pg.78 , Pg.79 ]




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