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Reference curves capacitive circuits

To a certain extent, the interconnection inherits the poorest properties of both apparatus. If during the design of a category ia circuit capacitance C and inductance L are examined simultaneously (for zone 0 application), then various combinations (CG, L0) are given in the certificate (Fig. 6.220) for the most part. As a rule, these values are smaller than those derived from the reference curves. [Pg.391]

Overlooking the reference curves for resistive circuits (Fig. 6.162) it is obvious that relatively high currents are permissible for low voltages. More detailed information is given in Tables A.1 (resistive circuits, Groups IIA/B/C) and A.2 (capacitive circuits, Groups IIA/B/C) of EN 50020 or IEC 60079-11 respectively. (Table 6.39 is an abstract of Tables A.l and A.2 as far as resistive and capacitive circuits are concerned.)... [Pg.408]

Gext = K4 has passed the external circuit (the values of g xt are always referred to the unit surface area of the electrode) is shown in Fig. 10.9. From the slope of the curve one can determine the electrode s capacitance C. In this method there is no need for complex equipment it is very convenient for samples with large true surface areas (highly disperse deposits, powders, etc.). [Pg.173]

To avoid artifacts in impedance measurements when modulating the input voltage of the potentiostat at high frequencies (>10 kHz), the reference electrode should be short-circuited via a capacitance of 10 nF and a Pt wire dipped into the solution in the main part of the cell (Fig. 4.2). The surface of the counter electrode should be sufficiently large so that its interface with the electrolyte does not influence the current-potential curve. Usually a platinized Pt sheet is used as a counter electrode. The electrolyte is made conductive by adding an inert salt of a concentration in the range of 10-3-10- M. [Pg.62]

The LIS was carried out at open circuit potential (Fig. 4.13), which was aimed at confirming the results of cathodic polarization curve and at demonstrating the ohmic drop between working and reference electrode. The EIS of Mg-Gd-Y alloy under TEL consisted of two capacitive loops in the high and low frequency ranges. [Pg.184]


See other pages where Reference curves capacitive circuits is mentioned: [Pg.399]    [Pg.171]    [Pg.326]    [Pg.222]    [Pg.193]    [Pg.425]    [Pg.81]    [Pg.173]   


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Reference curves

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