Pull-down resistor

Note In the worked example, we had estimated the losses to be 1.5 W. There we had a pull-up of 2 ohms, and a pull-down of 1 ohm. Whereas in Figure 5-18, we have basically doubled the pull-up and pull-down resistors. However, the switching loss has not doubled — it is only 73% more. 

Finally, in Figure 5-21, we are keeping the pull-up + pull-down constant, as we vary the ratio of the pull-up and pull-down resistors. This is from the IC designer s viewpoint — suppose he or she has roughly allocated a certain die area for the driver stage, say simplistically fixed the pull-up + pull-down. Then the question is — how should the available drive capability be distributed between the pull-up and the pull-down sections. For example, if pull-up + pull-down = 6 ohms, is it better to split this as — pull-up = 4 ohms... 

The LTCC technology offers tire possibility of fabricating resistors and capacitors on inner layers that can be cofired along with the other circuitry. This saves a tremendous amoimt of area over conventional circuits and increases the packaging density by orders of magnitude. Consider that every input and output of a digital circuit needs a pull-up or pull-down resistor. In a complex circuit, this can require hundreds or even thousands of resistors. 

This spare input pin should be held to a 0 value when the IC is performing its normal function. A pull-down resistor to ground could assure tiiis, whereas during test, a tester signal could assert a 1 value when needed for testing. 

An optional fifth pin called Test Reset (TRST ) is an asynchronous active low reset for the 1149.1 circuitry. Because any TAP can be reset by five clock pulses to TCK while TMS is held high, TRST is not actually needed for resetting an 1149.1 device. It is often included as a fail-safe measure with a board-level pull-down resistor providing a constant reset to the TAP. Many 1149.1-compliant ICs do not include the TRST pin because the extra pin required may be too costly. 

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