Practical DM Filter Design

In Table 14-1 we have provided the height of the switch current trapezoid for all the main topologies (with the flat-top approximation). 

The voltage across the ESR of the input bulk capacitor is therefore 

If there was no filter present, the switching noise current received by the LISN would be 

However the analyzer measures the noise across one of the two effective series 50 C resistors in the LISN. So the measured level of noise is 

We have assumed that Cbulk is very large, and that it has no ESL, and also that its ESR is much less than 100 2. 

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